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commit 9830afca9273787f32e236ae5d0e4d3a378ae842
parent 30807ef2b76e01ea209fcad66a87e534ed1edb40
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Wed, 26 Dec 2018 10:29:47 -0800

Merge tag 'riscv-for-linus-4.21-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux

Pull RISC-V updates from Palmer Dabbelt:
 "We don't have many patches for this merge window, probably because
  everything has been a bit busy with the holidays and conferences. The
  only big user-visible change is to move over to an SBI-based earlycon
  instead of our arch-specific early printk support.

  The only outstanding patch set I know of is the audit patch set, which
  I've managed to make a mess of and will attempt to clean up"

* tag 'riscv-for-linus-4.21-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux:
  RISC-V: Select GENERIC_SCHED_CLOCK for clocksource drivers
  RISC-V: lib: minor asm cleanup
  RISC-V: Update Kconfig to better handle CMDLINE
  riscv: remove unused variable in ftrace
  RISC-V: add of_node_put()
  RISC-V: Fix of_node_* refcount
  riscv, atomic: Add #define's for the atomic_{cmp,}xchg_*() variants
  RISC-V: Remove EARLY_PRINTK support
  RISC-V: defconfig: Enable RISC-V SBI earlycon support

Diffstat:
March/riscv/Kconfig | 58++++++++++++++++++++++++++++++++++------------------------
March/riscv/Kconfig.debug | 2--
March/riscv/configs/defconfig | 1+
March/riscv/include/asm/atomic.h | 9+++++++++
March/riscv/kernel/cacheinfo.c | 11+++++++++++
March/riscv/kernel/cpu.c | 1+
March/riscv/kernel/cpufeature.c | 2++
March/riscv/kernel/ftrace.c | 1-
March/riscv/kernel/perf_event.c | 1+
March/riscv/kernel/setup.c | 28----------------------------
March/riscv/kernel/smpboot.c | 6+++++-
March/riscv/kernel/time.c | 1+
March/riscv/lib/tishift.S | 59+++++++++++++++++++++++++++++++----------------------------
March/riscv/lib/udivdi3.S | 42++++++++++++++++++++++--------------------
14 files changed, 118 insertions(+), 104 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig @@ -24,6 +24,7 @@ config RISCV select GENERIC_CPU_DEVICES select GENERIC_IRQ_SHOW select GENERIC_PCI_IOMAP + select GENERIC_SCHED_CLOCK select GENERIC_STRNCPY_FROM_USER select GENERIC_STRNLEN_USER select GENERIC_SMP_IDLE_THREAD @@ -227,39 +228,48 @@ endmenu menu "Boot options" -config CMDLINE_BOOL - bool "Built-in kernel command line" +config CMDLINE + string "Built-in kernel command line" help - For most platforms, it is firmware or second stage bootloader - that by default specifies the kernel command line options. - However, it might be necessary or advantageous to either override - the default kernel command line or add a few extra options to it. - For such cases, this option allows hardcoding command line options - directly into the kernel. + For most platforms, the arguments for the kernel's command line + are provided at run-time, during boot. However, there are cases + where either no arguments are being provided or the provided + arguments are insufficient or even invalid. - For that, choose 'Y' here and fill in the extra boot parameters - in CONFIG_CMDLINE. + When that occurs, it is possible to define a built-in command + line here and choose how the kernel should use it later on. - The built-in options will be concatenated to the default command - line if CMDLINE_FORCE is set to 'N'. Otherwise, the default - command line will be ignored and replaced by the built-in string. +choice + prompt "Built-in command line usage" if CMDLINE != "" + default CMDLINE_FALLBACK + help + Choose how the kernel will handle the provided built-in command + line. -config CMDLINE - string "Built-in kernel command string" - depends on CMDLINE_BOOL - default "" +config CMDLINE_FALLBACK + bool "Use bootloader kernel arguments if available" help - Supply command-line options at build time by entering them here. + Use the built-in command line as fallback in case we get nothing + during boot. This is the default behaviour. + +config CMDLINE_EXTEND + bool "Extend bootloader kernel arguments" + help + The command-line arguments provided during boot will be + appended to the built-in command line. This is useful in + cases where the provided arguments are insufficient and + you don't want to or cannot modify them. + config CMDLINE_FORCE - bool "Built-in command line overrides bootloader arguments" - depends on CMDLINE_BOOL + bool "Always use the default kernel command string" help - Set this option to 'Y' to have the kernel ignore the bootloader - or firmware command line. Instead, the built-in command line - will be used exclusively. + Always use the built-in command line, even if we get one during + boot. This is useful in case you need to override the provided + command line on systems where you don't have or want control + over it. - If you don't know what to do here, say N. +endchoice endmenu diff --git a/arch/riscv/Kconfig.debug b/arch/riscv/Kconfig.debug @@ -1,2 +0,0 @@ -config EARLY_PRINTK - def_bool y diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig @@ -46,6 +46,7 @@ CONFIG_INPUT_MOUSEDEV=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_HVC_RISCV_SBI=y # CONFIG_PTP_1588_CLOCK is not set CONFIG_DRM=y diff --git a/arch/riscv/include/asm/atomic.h b/arch/riscv/include/asm/atomic.h @@ -303,6 +303,15 @@ c_t atomic##prefix##_cmpxchg(atomic##prefix##_t *v, c_t o, c_t n) \ ATOMIC_OPS() +#define atomic_xchg_relaxed atomic_xchg_relaxed +#define atomic_xchg_acquire atomic_xchg_acquire +#define atomic_xchg_release atomic_xchg_release +#define atomic_xchg atomic_xchg +#define atomic_cmpxchg_relaxed atomic_cmpxchg_relaxed +#define atomic_cmpxchg_acquire atomic_cmpxchg_acquire +#define atomic_cmpxchg_release atomic_cmpxchg_release +#define atomic_cmpxchg atomic_cmpxchg + #undef ATOMIC_OPS #undef ATOMIC_OP diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c @@ -28,6 +28,7 @@ static int __init_cache_level(unsigned int cpu) { struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); struct device_node *np = of_cpu_device_node_get(cpu); + struct device_node *prev = NULL; int levels = 0, leaves = 0, level; if (of_property_read_bool(np, "cache-size")) @@ -39,7 +40,10 @@ static int __init_cache_level(unsigned int cpu) if (leaves > 0) levels = 1; + prev = np; while ((np = of_find_next_cache_node(np))) { + of_node_put(prev); + prev = np; if (!of_device_is_compatible(np, "cache")) break; if (of_property_read_u32(np, "cache-level", &level)) @@ -55,8 +59,10 @@ static int __init_cache_level(unsigned int cpu) levels = level; } + of_node_put(np); this_cpu_ci->num_levels = levels; this_cpu_ci->num_leaves = leaves; + return 0; } @@ -65,6 +71,7 @@ static int __populate_cache_leaves(unsigned int cpu) struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); struct cacheinfo *this_leaf = this_cpu_ci->info_list; struct device_node *np = of_cpu_device_node_get(cpu); + struct device_node *prev = NULL; int levels = 1, level = 1; if (of_property_read_bool(np, "cache-size")) @@ -74,7 +81,10 @@ static int __populate_cache_leaves(unsigned int cpu) if (of_property_read_bool(np, "d-cache-size")) ci_leaf_init(this_leaf++, np, CACHE_TYPE_DATA, level); + prev = np; while ((np = of_find_next_cache_node(np))) { + of_node_put(prev); + prev = np; if (!of_device_is_compatible(np, "cache")) break; if (of_property_read_u32(np, "cache-level", &level)) @@ -89,6 +99,7 @@ static int __populate_cache_leaves(unsigned int cpu) ci_leaf_init(this_leaf++, np, CACHE_TYPE_DATA, level); levels = level; } + of_node_put(np); return 0; } diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c @@ -158,6 +158,7 @@ static int c_show(struct seq_file *m, void *v) && strcmp(compat, "riscv")) seq_printf(m, "uarch\t\t: %s\n", compat); seq_puts(m, "\n"); + of_node_put(node); return 0; } diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c @@ -56,8 +56,10 @@ void riscv_fill_hwcap(void) if (of_property_read_string(node, "riscv,isa", &isa)) { pr_warning("Unable to find \"riscv,isa\" devicetree entry"); + of_node_put(node); return; } + of_node_put(node); for (i = 0; i < strlen(isa); ++i) elf_hwcap |= isa2hwcap[(unsigned char)(isa[i])]; diff --git a/arch/riscv/kernel/ftrace.c b/arch/riscv/kernel/ftrace.c @@ -132,7 +132,6 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr, { unsigned long return_hooker = (unsigned long)&return_to_handler; unsigned long old; - int err; if (unlikely(atomic_read(&current->tracing_graph_pause))) return; diff --git a/arch/riscv/kernel/perf_event.c b/arch/riscv/kernel/perf_event.c @@ -476,6 +476,7 @@ int __init init_hw_perf_events(void) if (of_id) riscv_pmu = of_id->data; + of_node_put(node); } perf_pmu_register(riscv_pmu->pmu, "cpu", PERF_TYPE_RAW); diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c @@ -35,31 +35,9 @@ #include <asm/sections.h> #include <asm/pgtable.h> #include <asm/smp.h> -#include <asm/sbi.h> #include <asm/tlbflush.h> #include <asm/thread_info.h> -#ifdef CONFIG_EARLY_PRINTK -static void sbi_console_write(struct console *co, const char *buf, - unsigned int n) -{ - int i; - - for (i = 0; i < n; ++i) { - if (buf[i] == '\n') - sbi_console_putchar('\r'); - sbi_console_putchar(buf[i]); - } -} - -struct console riscv_sbi_early_console_dev __initdata = { - .name = "early", - .write = sbi_console_write, - .flags = CON_PRINTBUFFER | CON_BOOT | CON_ANYTIME, - .index = -1 -}; -#endif - #ifdef CONFIG_DUMMY_CONSOLE struct screen_info screen_info = { .orig_video_lines = 30, @@ -219,12 +197,6 @@ static void __init setup_bootmem(void) void __init setup_arch(char **cmdline_p) { -#if defined(CONFIG_EARLY_PRINTK) - if (likely(early_console == NULL)) { - early_console = &riscv_sbi_early_console_dev; - register_console(early_console); - } -#endif *cmdline_p = boot_command_line; parse_early_param(); diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c @@ -57,12 +57,15 @@ void __init setup_smp(void) while ((dn = of_find_node_by_type(dn, "cpu"))) { hart = riscv_of_processor_hartid(dn); - if (hart < 0) + if (hart < 0) { + of_node_put(dn); continue; + } if (hart == cpuid_to_hartid_map(0)) { BUG_ON(found_boot_cpu); found_boot_cpu = 1; + of_node_put(dn); continue; } @@ -70,6 +73,7 @@ void __init setup_smp(void) set_cpu_possible(cpuid, true); set_cpu_present(cpuid, true); cpuid++; + of_node_put(dn); } BUG_ON(!found_boot_cpu); diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c @@ -26,6 +26,7 @@ void __init time_init(void) cpu = of_find_node_by_path("/cpus"); if (!cpu || of_property_read_u32(cpu, "timebase-frequency", &prop)) panic(KERN_WARNING "RISC-V system with no 'timebase-frequency' in DTS\n"); + of_node_put(cpu); riscv_timebase = prop; lpj_fine = riscv_timebase / HZ; diff --git a/arch/riscv/lib/tishift.S b/arch/riscv/lib/tishift.S @@ -10,33 +10,36 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ - .globl __lshrti3 -__lshrti3: - beqz a2, .L1 - li a5,64 - sub a5,a5,a2 - addi sp,sp,-16 - sext.w a4,a5 - blez a5, .L2 - sext.w a2,a2 - sll a4,a1,a4 - srl a0,a0,a2 - srl a1,a1,a2 - or a0,a0,a4 - sd a1,8(sp) - sd a0,0(sp) - ld a0,0(sp) - ld a1,8(sp) - addi sp,sp,16 - ret + +#include <linux/linkage.h> + +ENTRY(__lshrti3) + beqz a2, .L1 + li a5,64 + sub a5,a5,a2 + addi sp,sp,-16 + sext.w a4,a5 + blez a5, .L2 + sext.w a2,a2 + sll a4,a1,a4 + srl a0,a0,a2 + srl a1,a1,a2 + or a0,a0,a4 + sd a1,8(sp) + sd a0,0(sp) + ld a0,0(sp) + ld a1,8(sp) + addi sp,sp,16 + ret .L1: - ret + ret .L2: - negw a4,a4 - srl a1,a1,a4 - sd a1,0(sp) - sd zero,8(sp) - ld a0,0(sp) - ld a1,8(sp) - addi sp,sp,16 - ret + negw a4,a4 + srl a1,a1,a4 + sd a1,0(sp) + sd zero,8(sp) + ld a0,0(sp) + ld a1,8(sp) + addi sp,sp,16 + ret +ENDPROC(__lshrti3) diff --git a/arch/riscv/lib/udivdi3.S b/arch/riscv/lib/udivdi3.S @@ -11,28 +11,30 @@ * GNU General Public License for more details. */ - .globl __udivdi3 -__udivdi3: - mv a2, a1 - mv a1, a0 - li a0, -1 - beqz a2, .L5 - li a3, 1 - bgeu a2, a1, .L2 +#include <linux/linkage.h> + +ENTRY(__udivdi3) + mv a2, a1 + mv a1, a0 + li a0, -1 + beqz a2, .L5 + li a3, 1 + bgeu a2, a1, .L2 .L1: - blez a2, .L2 - slli a2, a2, 1 - slli a3, a3, 1 - bgtu a1, a2, .L1 + blez a2, .L2 + slli a2, a2, 1 + slli a3, a3, 1 + bgtu a1, a2, .L1 .L2: - li a0, 0 + li a0, 0 .L3: - bltu a1, a2, .L4 - sub a1, a1, a2 - or a0, a0, a3 + bltu a1, a2, .L4 + sub a1, a1, a2 + or a0, a0, a3 .L4: - srli a3, a3, 1 - srli a2, a2, 1 - bnez a3, .L3 + srli a3, a3, 1 + srli a2, a2, 1 + bnez a3, .L3 .L5: - ret + ret +ENDPROC(__udivdi3)