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rtc-sh.c (17234B)


      1 // SPDX-License-Identifier: GPL-2.0
      2 /*
      3  * SuperH On-Chip RTC Support
      4  *
      5  * Copyright (C) 2006 - 2009  Paul Mundt
      6  * Copyright (C) 2006  Jamie Lenehan
      7  * Copyright (C) 2008  Angelo Castello
      8  *
      9  * Based on the old arch/sh/kernel/cpu/rtc.c by:
     10  *
     11  *  Copyright (C) 2000  Philipp Rumpf <prumpf@tux.org>
     12  *  Copyright (C) 1999  Tetsuya Okada & Niibe Yutaka
     13  */
     14 #include <linux/module.h>
     15 #include <linux/mod_devicetable.h>
     16 #include <linux/kernel.h>
     17 #include <linux/bcd.h>
     18 #include <linux/rtc.h>
     19 #include <linux/init.h>
     20 #include <linux/platform_device.h>
     21 #include <linux/seq_file.h>
     22 #include <linux/interrupt.h>
     23 #include <linux/spinlock.h>
     24 #include <linux/io.h>
     25 #include <linux/log2.h>
     26 #include <linux/clk.h>
     27 #include <linux/slab.h>
     28 #ifdef CONFIG_SUPERH
     29 #include <asm/rtc.h>
     30 #else
     31 /* Default values for RZ/A RTC */
     32 #define rtc_reg_size		sizeof(u16)
     33 #define RTC_BIT_INVERTED        0	/* no chip bugs */
     34 #define RTC_CAP_4_DIGIT_YEAR    (1 << 0)
     35 #define RTC_DEF_CAPABILITIES    RTC_CAP_4_DIGIT_YEAR
     36 #endif
     37 
     38 #define DRV_NAME	"sh-rtc"
     39 
     40 #define RTC_REG(r)	((r) * rtc_reg_size)
     41 
     42 #define R64CNT		RTC_REG(0)
     43 
     44 #define RSECCNT		RTC_REG(1)	/* RTC sec */
     45 #define RMINCNT		RTC_REG(2)	/* RTC min */
     46 #define RHRCNT		RTC_REG(3)	/* RTC hour */
     47 #define RWKCNT		RTC_REG(4)	/* RTC week */
     48 #define RDAYCNT		RTC_REG(5)	/* RTC day */
     49 #define RMONCNT		RTC_REG(6)	/* RTC month */
     50 #define RYRCNT		RTC_REG(7)	/* RTC year */
     51 #define RSECAR		RTC_REG(8)	/* ALARM sec */
     52 #define RMINAR		RTC_REG(9)	/* ALARM min */
     53 #define RHRAR		RTC_REG(10)	/* ALARM hour */
     54 #define RWKAR		RTC_REG(11)	/* ALARM week */
     55 #define RDAYAR		RTC_REG(12)	/* ALARM day */
     56 #define RMONAR		RTC_REG(13)	/* ALARM month */
     57 #define RCR1		RTC_REG(14)	/* Control */
     58 #define RCR2		RTC_REG(15)	/* Control */
     59 
     60 /*
     61  * Note on RYRAR and RCR3: Up until this point most of the register
     62  * definitions are consistent across all of the available parts. However,
     63  * the placement of the optional RYRAR and RCR3 (the RYRAR control
     64  * register used to control RYRCNT/RYRAR compare) varies considerably
     65  * across various parts, occasionally being mapped in to a completely
     66  * unrelated address space. For proper RYRAR support a separate resource
     67  * would have to be handed off, but as this is purely optional in
     68  * practice, we simply opt not to support it, thereby keeping the code
     69  * quite a bit more simplified.
     70  */
     71 
     72 /* ALARM Bits - or with BCD encoded value */
     73 #define AR_ENB		0x80	/* Enable for alarm cmp   */
     74 
     75 /* Period Bits */
     76 #define PF_HP		0x100	/* Enable Half Period to support 8,32,128Hz */
     77 #define PF_COUNT	0x200	/* Half periodic counter */
     78 #define PF_OXS		0x400	/* Periodic One x Second */
     79 #define PF_KOU		0x800	/* Kernel or User periodic request 1=kernel */
     80 #define PF_MASK		0xf00
     81 
     82 /* RCR1 Bits */
     83 #define RCR1_CF		0x80	/* Carry Flag             */
     84 #define RCR1_CIE	0x10	/* Carry Interrupt Enable */
     85 #define RCR1_AIE	0x08	/* Alarm Interrupt Enable */
     86 #define RCR1_AF		0x01	/* Alarm Flag             */
     87 
     88 /* RCR2 Bits */
     89 #define RCR2_PEF	0x80	/* PEriodic interrupt Flag */
     90 #define RCR2_PESMASK	0x70	/* Periodic interrupt Set  */
     91 #define RCR2_RTCEN	0x08	/* ENable RTC              */
     92 #define RCR2_ADJ	0x04	/* ADJustment (30-second)  */
     93 #define RCR2_RESET	0x02	/* Reset bit               */
     94 #define RCR2_START	0x01	/* Start bit               */
     95 
     96 struct sh_rtc {
     97 	void __iomem		*regbase;
     98 	unsigned long		regsize;
     99 	struct resource		*res;
    100 	int			alarm_irq;
    101 	int			periodic_irq;
    102 	int			carry_irq;
    103 	struct clk		*clk;
    104 	struct rtc_device	*rtc_dev;
    105 	spinlock_t		lock;
    106 	unsigned long		capabilities;	/* See asm/rtc.h for cap bits */
    107 	unsigned short		periodic_freq;
    108 };
    109 
    110 static int __sh_rtc_interrupt(struct sh_rtc *rtc)
    111 {
    112 	unsigned int tmp, pending;
    113 
    114 	tmp = readb(rtc->regbase + RCR1);
    115 	pending = tmp & RCR1_CF;
    116 	tmp &= ~RCR1_CF;
    117 	writeb(tmp, rtc->regbase + RCR1);
    118 
    119 	/* Users have requested One x Second IRQ */
    120 	if (pending && rtc->periodic_freq & PF_OXS)
    121 		rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
    122 
    123 	return pending;
    124 }
    125 
    126 static int __sh_rtc_alarm(struct sh_rtc *rtc)
    127 {
    128 	unsigned int tmp, pending;
    129 
    130 	tmp = readb(rtc->regbase + RCR1);
    131 	pending = tmp & RCR1_AF;
    132 	tmp &= ~(RCR1_AF | RCR1_AIE);
    133 	writeb(tmp, rtc->regbase + RCR1);
    134 
    135 	if (pending)
    136 		rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
    137 
    138 	return pending;
    139 }
    140 
    141 static int __sh_rtc_periodic(struct sh_rtc *rtc)
    142 {
    143 	unsigned int tmp, pending;
    144 
    145 	tmp = readb(rtc->regbase + RCR2);
    146 	pending = tmp & RCR2_PEF;
    147 	tmp &= ~RCR2_PEF;
    148 	writeb(tmp, rtc->regbase + RCR2);
    149 
    150 	if (!pending)
    151 		return 0;
    152 
    153 	/* Half period enabled than one skipped and the next notified */
    154 	if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
    155 		rtc->periodic_freq &= ~PF_COUNT;
    156 	else {
    157 		if (rtc->periodic_freq & PF_HP)
    158 			rtc->periodic_freq |= PF_COUNT;
    159 		rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
    160 	}
    161 
    162 	return pending;
    163 }
    164 
    165 static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
    166 {
    167 	struct sh_rtc *rtc = dev_id;
    168 	int ret;
    169 
    170 	spin_lock(&rtc->lock);
    171 	ret = __sh_rtc_interrupt(rtc);
    172 	spin_unlock(&rtc->lock);
    173 
    174 	return IRQ_RETVAL(ret);
    175 }
    176 
    177 static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
    178 {
    179 	struct sh_rtc *rtc = dev_id;
    180 	int ret;
    181 
    182 	spin_lock(&rtc->lock);
    183 	ret = __sh_rtc_alarm(rtc);
    184 	spin_unlock(&rtc->lock);
    185 
    186 	return IRQ_RETVAL(ret);
    187 }
    188 
    189 static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
    190 {
    191 	struct sh_rtc *rtc = dev_id;
    192 	int ret;
    193 
    194 	spin_lock(&rtc->lock);
    195 	ret = __sh_rtc_periodic(rtc);
    196 	spin_unlock(&rtc->lock);
    197 
    198 	return IRQ_RETVAL(ret);
    199 }
    200 
    201 static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
    202 {
    203 	struct sh_rtc *rtc = dev_id;
    204 	int ret;
    205 
    206 	spin_lock(&rtc->lock);
    207 	ret = __sh_rtc_interrupt(rtc);
    208 	ret |= __sh_rtc_alarm(rtc);
    209 	ret |= __sh_rtc_periodic(rtc);
    210 	spin_unlock(&rtc->lock);
    211 
    212 	return IRQ_RETVAL(ret);
    213 }
    214 
    215 static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
    216 {
    217 	struct sh_rtc *rtc = dev_get_drvdata(dev);
    218 	unsigned int tmp;
    219 
    220 	spin_lock_irq(&rtc->lock);
    221 
    222 	tmp = readb(rtc->regbase + RCR1);
    223 
    224 	if (enable)
    225 		tmp |= RCR1_AIE;
    226 	else
    227 		tmp &= ~RCR1_AIE;
    228 
    229 	writeb(tmp, rtc->regbase + RCR1);
    230 
    231 	spin_unlock_irq(&rtc->lock);
    232 }
    233 
    234 static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
    235 {
    236 	struct sh_rtc *rtc = dev_get_drvdata(dev);
    237 	unsigned int tmp;
    238 
    239 	tmp = readb(rtc->regbase + RCR1);
    240 	seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
    241 
    242 	tmp = readb(rtc->regbase + RCR2);
    243 	seq_printf(seq, "periodic_IRQ\t: %s\n",
    244 		   (tmp & RCR2_PESMASK) ? "yes" : "no");
    245 
    246 	return 0;
    247 }
    248 
    249 static inline void sh_rtc_setcie(struct device *dev, unsigned int enable)
    250 {
    251 	struct sh_rtc *rtc = dev_get_drvdata(dev);
    252 	unsigned int tmp;
    253 
    254 	spin_lock_irq(&rtc->lock);
    255 
    256 	tmp = readb(rtc->regbase + RCR1);
    257 
    258 	if (!enable)
    259 		tmp &= ~RCR1_CIE;
    260 	else
    261 		tmp |= RCR1_CIE;
    262 
    263 	writeb(tmp, rtc->regbase + RCR1);
    264 
    265 	spin_unlock_irq(&rtc->lock);
    266 }
    267 
    268 static int sh_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
    269 {
    270 	sh_rtc_setaie(dev, enabled);
    271 	return 0;
    272 }
    273 
    274 static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
    275 {
    276 	struct sh_rtc *rtc = dev_get_drvdata(dev);
    277 	unsigned int sec128, sec2, yr, yr100, cf_bit;
    278 
    279 	do {
    280 		unsigned int tmp;
    281 
    282 		spin_lock_irq(&rtc->lock);
    283 
    284 		tmp = readb(rtc->regbase + RCR1);
    285 		tmp &= ~RCR1_CF; /* Clear CF-bit */
    286 		tmp |= RCR1_CIE;
    287 		writeb(tmp, rtc->regbase + RCR1);
    288 
    289 		sec128 = readb(rtc->regbase + R64CNT);
    290 
    291 		tm->tm_sec	= bcd2bin(readb(rtc->regbase + RSECCNT));
    292 		tm->tm_min	= bcd2bin(readb(rtc->regbase + RMINCNT));
    293 		tm->tm_hour	= bcd2bin(readb(rtc->regbase + RHRCNT));
    294 		tm->tm_wday	= bcd2bin(readb(rtc->regbase + RWKCNT));
    295 		tm->tm_mday	= bcd2bin(readb(rtc->regbase + RDAYCNT));
    296 		tm->tm_mon	= bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
    297 
    298 		if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
    299 			yr  = readw(rtc->regbase + RYRCNT);
    300 			yr100 = bcd2bin(yr >> 8);
    301 			yr &= 0xff;
    302 		} else {
    303 			yr  = readb(rtc->regbase + RYRCNT);
    304 			yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
    305 		}
    306 
    307 		tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
    308 
    309 		sec2 = readb(rtc->regbase + R64CNT);
    310 		cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
    311 
    312 		spin_unlock_irq(&rtc->lock);
    313 	} while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
    314 
    315 #if RTC_BIT_INVERTED != 0
    316 	if ((sec128 & RTC_BIT_INVERTED))
    317 		tm->tm_sec--;
    318 #endif
    319 
    320 	/* only keep the carry interrupt enabled if UIE is on */
    321 	if (!(rtc->periodic_freq & PF_OXS))
    322 		sh_rtc_setcie(dev, 0);
    323 
    324 	dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
    325 		"mday=%d, mon=%d, year=%d, wday=%d\n",
    326 		__func__,
    327 		tm->tm_sec, tm->tm_min, tm->tm_hour,
    328 		tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
    329 
    330 	return 0;
    331 }
    332 
    333 static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
    334 {
    335 	struct sh_rtc *rtc = dev_get_drvdata(dev);
    336 	unsigned int tmp;
    337 	int year;
    338 
    339 	spin_lock_irq(&rtc->lock);
    340 
    341 	/* Reset pre-scaler & stop RTC */
    342 	tmp = readb(rtc->regbase + RCR2);
    343 	tmp |= RCR2_RESET;
    344 	tmp &= ~RCR2_START;
    345 	writeb(tmp, rtc->regbase + RCR2);
    346 
    347 	writeb(bin2bcd(tm->tm_sec),  rtc->regbase + RSECCNT);
    348 	writeb(bin2bcd(tm->tm_min),  rtc->regbase + RMINCNT);
    349 	writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
    350 	writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
    351 	writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
    352 	writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
    353 
    354 	if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
    355 		year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
    356 			bin2bcd(tm->tm_year % 100);
    357 		writew(year, rtc->regbase + RYRCNT);
    358 	} else {
    359 		year = tm->tm_year % 100;
    360 		writeb(bin2bcd(year), rtc->regbase + RYRCNT);
    361 	}
    362 
    363 	/* Start RTC */
    364 	tmp = readb(rtc->regbase + RCR2);
    365 	tmp &= ~RCR2_RESET;
    366 	tmp |= RCR2_RTCEN | RCR2_START;
    367 	writeb(tmp, rtc->regbase + RCR2);
    368 
    369 	spin_unlock_irq(&rtc->lock);
    370 
    371 	return 0;
    372 }
    373 
    374 static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
    375 {
    376 	unsigned int byte;
    377 	int value = -1;			/* return -1 for ignored values */
    378 
    379 	byte = readb(rtc->regbase + reg_off);
    380 	if (byte & AR_ENB) {
    381 		byte &= ~AR_ENB;	/* strip the enable bit */
    382 		value = bcd2bin(byte);
    383 	}
    384 
    385 	return value;
    386 }
    387 
    388 static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
    389 {
    390 	struct sh_rtc *rtc = dev_get_drvdata(dev);
    391 	struct rtc_time *tm = &wkalrm->time;
    392 
    393 	spin_lock_irq(&rtc->lock);
    394 
    395 	tm->tm_sec	= sh_rtc_read_alarm_value(rtc, RSECAR);
    396 	tm->tm_min	= sh_rtc_read_alarm_value(rtc, RMINAR);
    397 	tm->tm_hour	= sh_rtc_read_alarm_value(rtc, RHRAR);
    398 	tm->tm_wday	= sh_rtc_read_alarm_value(rtc, RWKAR);
    399 	tm->tm_mday	= sh_rtc_read_alarm_value(rtc, RDAYAR);
    400 	tm->tm_mon	= sh_rtc_read_alarm_value(rtc, RMONAR);
    401 	if (tm->tm_mon > 0)
    402 		tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
    403 
    404 	wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
    405 
    406 	spin_unlock_irq(&rtc->lock);
    407 
    408 	return 0;
    409 }
    410 
    411 static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
    412 					    int value, int reg_off)
    413 {
    414 	/* < 0 for a value that is ignored */
    415 	if (value < 0)
    416 		writeb(0, rtc->regbase + reg_off);
    417 	else
    418 		writeb(bin2bcd(value) | AR_ENB,  rtc->regbase + reg_off);
    419 }
    420 
    421 static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
    422 {
    423 	struct sh_rtc *rtc = dev_get_drvdata(dev);
    424 	unsigned int rcr1;
    425 	struct rtc_time *tm = &wkalrm->time;
    426 	int mon;
    427 
    428 	spin_lock_irq(&rtc->lock);
    429 
    430 	/* disable alarm interrupt and clear the alarm flag */
    431 	rcr1 = readb(rtc->regbase + RCR1);
    432 	rcr1 &= ~(RCR1_AF | RCR1_AIE);
    433 	writeb(rcr1, rtc->regbase + RCR1);
    434 
    435 	/* set alarm time */
    436 	sh_rtc_write_alarm_value(rtc, tm->tm_sec,  RSECAR);
    437 	sh_rtc_write_alarm_value(rtc, tm->tm_min,  RMINAR);
    438 	sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
    439 	sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
    440 	sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
    441 	mon = tm->tm_mon;
    442 	if (mon >= 0)
    443 		mon += 1;
    444 	sh_rtc_write_alarm_value(rtc, mon, RMONAR);
    445 
    446 	if (wkalrm->enabled) {
    447 		rcr1 |= RCR1_AIE;
    448 		writeb(rcr1, rtc->regbase + RCR1);
    449 	}
    450 
    451 	spin_unlock_irq(&rtc->lock);
    452 
    453 	return 0;
    454 }
    455 
    456 static const struct rtc_class_ops sh_rtc_ops = {
    457 	.read_time	= sh_rtc_read_time,
    458 	.set_time	= sh_rtc_set_time,
    459 	.read_alarm	= sh_rtc_read_alarm,
    460 	.set_alarm	= sh_rtc_set_alarm,
    461 	.proc		= sh_rtc_proc,
    462 	.alarm_irq_enable = sh_rtc_alarm_irq_enable,
    463 };
    464 
    465 static int __init sh_rtc_probe(struct platform_device *pdev)
    466 {
    467 	struct sh_rtc *rtc;
    468 	struct resource *res;
    469 	struct rtc_time r;
    470 	char clk_name[6];
    471 	int clk_id, ret;
    472 
    473 	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
    474 	if (unlikely(!rtc))
    475 		return -ENOMEM;
    476 
    477 	spin_lock_init(&rtc->lock);
    478 
    479 	/* get periodic/carry/alarm irqs */
    480 	ret = platform_get_irq(pdev, 0);
    481 	if (unlikely(ret <= 0)) {
    482 		dev_err(&pdev->dev, "No IRQ resource\n");
    483 		return -ENOENT;
    484 	}
    485 
    486 	rtc->periodic_irq = ret;
    487 	rtc->carry_irq = platform_get_irq(pdev, 1);
    488 	rtc->alarm_irq = platform_get_irq(pdev, 2);
    489 
    490 	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
    491 	if (!res)
    492 		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
    493 	if (unlikely(res == NULL)) {
    494 		dev_err(&pdev->dev, "No IO resource\n");
    495 		return -ENOENT;
    496 	}
    497 
    498 	rtc->regsize = resource_size(res);
    499 
    500 	rtc->res = devm_request_mem_region(&pdev->dev, res->start,
    501 					rtc->regsize, pdev->name);
    502 	if (unlikely(!rtc->res))
    503 		return -EBUSY;
    504 
    505 	rtc->regbase = devm_ioremap_nocache(&pdev->dev, rtc->res->start,
    506 					rtc->regsize);
    507 	if (unlikely(!rtc->regbase))
    508 		return -EINVAL;
    509 
    510 	if (!pdev->dev.of_node) {
    511 		clk_id = pdev->id;
    512 		/* With a single device, the clock id is still "rtc0" */
    513 		if (clk_id < 0)
    514 			clk_id = 0;
    515 
    516 		snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id);
    517 	} else
    518 		snprintf(clk_name, sizeof(clk_name), "fck");
    519 
    520 	rtc->clk = devm_clk_get(&pdev->dev, clk_name);
    521 	if (IS_ERR(rtc->clk)) {
    522 		/*
    523 		 * No error handling for rtc->clk intentionally, not all
    524 		 * platforms will have a unique clock for the RTC, and
    525 		 * the clk API can handle the struct clk pointer being
    526 		 * NULL.
    527 		 */
    528 		rtc->clk = NULL;
    529 	}
    530 
    531 	clk_enable(rtc->clk);
    532 
    533 	rtc->capabilities = RTC_DEF_CAPABILITIES;
    534 
    535 #ifdef CONFIG_SUPERH
    536 	if (dev_get_platdata(&pdev->dev)) {
    537 		struct sh_rtc_platform_info *pinfo =
    538 			dev_get_platdata(&pdev->dev);
    539 
    540 		/*
    541 		 * Some CPUs have special capabilities in addition to the
    542 		 * default set. Add those in here.
    543 		 */
    544 		rtc->capabilities |= pinfo->capabilities;
    545 	}
    546 #endif
    547 
    548 	if (rtc->carry_irq <= 0) {
    549 		/* register shared periodic/carry/alarm irq */
    550 		ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
    551 				sh_rtc_shared, 0, "sh-rtc", rtc);
    552 		if (unlikely(ret)) {
    553 			dev_err(&pdev->dev,
    554 				"request IRQ failed with %d, IRQ %d\n", ret,
    555 				rtc->periodic_irq);
    556 			goto err_unmap;
    557 		}
    558 	} else {
    559 		/* register periodic/carry/alarm irqs */
    560 		ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
    561 				sh_rtc_periodic, 0, "sh-rtc period", rtc);
    562 		if (unlikely(ret)) {
    563 			dev_err(&pdev->dev,
    564 				"request period IRQ failed with %d, IRQ %d\n",
    565 				ret, rtc->periodic_irq);
    566 			goto err_unmap;
    567 		}
    568 
    569 		ret = devm_request_irq(&pdev->dev, rtc->carry_irq,
    570 				sh_rtc_interrupt, 0, "sh-rtc carry", rtc);
    571 		if (unlikely(ret)) {
    572 			dev_err(&pdev->dev,
    573 				"request carry IRQ failed with %d, IRQ %d\n",
    574 				ret, rtc->carry_irq);
    575 			goto err_unmap;
    576 		}
    577 
    578 		ret = devm_request_irq(&pdev->dev, rtc->alarm_irq,
    579 				sh_rtc_alarm, 0, "sh-rtc alarm", rtc);
    580 		if (unlikely(ret)) {
    581 			dev_err(&pdev->dev,
    582 				"request alarm IRQ failed with %d, IRQ %d\n",
    583 				ret, rtc->alarm_irq);
    584 			goto err_unmap;
    585 		}
    586 	}
    587 
    588 	platform_set_drvdata(pdev, rtc);
    589 
    590 	/* everything disabled by default */
    591 	sh_rtc_setaie(&pdev->dev, 0);
    592 	sh_rtc_setcie(&pdev->dev, 0);
    593 
    594 	rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, "sh",
    595 					   &sh_rtc_ops, THIS_MODULE);
    596 	if (IS_ERR(rtc->rtc_dev)) {
    597 		ret = PTR_ERR(rtc->rtc_dev);
    598 		goto err_unmap;
    599 	}
    600 
    601 	rtc->rtc_dev->max_user_freq = 256;
    602 
    603 	/* reset rtc to epoch 0 if time is invalid */
    604 	if (rtc_read_time(rtc->rtc_dev, &r) < 0) {
    605 		rtc_time_to_tm(0, &r);
    606 		rtc_set_time(rtc->rtc_dev, &r);
    607 	}
    608 
    609 	device_init_wakeup(&pdev->dev, 1);
    610 	return 0;
    611 
    612 err_unmap:
    613 	clk_disable(rtc->clk);
    614 
    615 	return ret;
    616 }
    617 
    618 static int __exit sh_rtc_remove(struct platform_device *pdev)
    619 {
    620 	struct sh_rtc *rtc = platform_get_drvdata(pdev);
    621 
    622 	sh_rtc_setaie(&pdev->dev, 0);
    623 	sh_rtc_setcie(&pdev->dev, 0);
    624 
    625 	clk_disable(rtc->clk);
    626 
    627 	return 0;
    628 }
    629 
    630 static void sh_rtc_set_irq_wake(struct device *dev, int enabled)
    631 {
    632 	struct sh_rtc *rtc = dev_get_drvdata(dev);
    633 
    634 	irq_set_irq_wake(rtc->periodic_irq, enabled);
    635 
    636 	if (rtc->carry_irq > 0) {
    637 		irq_set_irq_wake(rtc->carry_irq, enabled);
    638 		irq_set_irq_wake(rtc->alarm_irq, enabled);
    639 	}
    640 }
    641 
    642 static int __maybe_unused sh_rtc_suspend(struct device *dev)
    643 {
    644 	if (device_may_wakeup(dev))
    645 		sh_rtc_set_irq_wake(dev, 1);
    646 
    647 	return 0;
    648 }
    649 
    650 static int __maybe_unused sh_rtc_resume(struct device *dev)
    651 {
    652 	if (device_may_wakeup(dev))
    653 		sh_rtc_set_irq_wake(dev, 0);
    654 
    655 	return 0;
    656 }
    657 
    658 static SIMPLE_DEV_PM_OPS(sh_rtc_pm_ops, sh_rtc_suspend, sh_rtc_resume);
    659 
    660 static const struct of_device_id sh_rtc_of_match[] = {
    661 	{ .compatible = "renesas,sh-rtc", },
    662 	{ /* sentinel */ }
    663 };
    664 MODULE_DEVICE_TABLE(of, sh_rtc_of_match);
    665 
    666 static struct platform_driver sh_rtc_platform_driver = {
    667 	.driver		= {
    668 		.name	= DRV_NAME,
    669 		.pm	= &sh_rtc_pm_ops,
    670 		.of_match_table = sh_rtc_of_match,
    671 	},
    672 	.remove		= __exit_p(sh_rtc_remove),
    673 };
    674 
    675 module_platform_driver_probe(sh_rtc_platform_driver, sh_rtc_probe);
    676 
    677 MODULE_DESCRIPTION("SuperH on-chip RTC driver");
    678 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
    679 	      "Jamie Lenehan <lenehan@twibble.org>, "
    680 	      "Angelo Castello <angelo.castello@st.com>");
    681 MODULE_LICENSE("GPL v2");
    682 MODULE_ALIAS("platform:" DRV_NAME);