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dwc3-pci.c (11597B)


      1 // SPDX-License-Identifier: GPL-2.0
      2 /**
      3  * dwc3-pci.c - PCI Specific glue layer
      4  *
      5  * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
      6  *
      7  * Authors: Felipe Balbi <balbi@ti.com>,
      8  *	    Sebastian Andrzej Siewior <bigeasy@linutronix.de>
      9  */
     10 
     11 #include <linux/kernel.h>
     12 #include <linux/module.h>
     13 #include <linux/slab.h>
     14 #include <linux/pci.h>
     15 #include <linux/workqueue.h>
     16 #include <linux/pm_runtime.h>
     17 #include <linux/platform_device.h>
     18 #include <linux/gpio/consumer.h>
     19 #include <linux/gpio/machine.h>
     20 #include <linux/acpi.h>
     21 #include <linux/delay.h>
     22 
     23 #define PCI_DEVICE_ID_INTEL_BYT			0x0f37
     24 #define PCI_DEVICE_ID_INTEL_MRFLD		0x119e
     25 #define PCI_DEVICE_ID_INTEL_BSW			0x22b7
     26 #define PCI_DEVICE_ID_INTEL_SPTLP		0x9d30
     27 #define PCI_DEVICE_ID_INTEL_SPTH		0xa130
     28 #define PCI_DEVICE_ID_INTEL_BXT			0x0aaa
     29 #define PCI_DEVICE_ID_INTEL_BXT_M		0x1aaa
     30 #define PCI_DEVICE_ID_INTEL_APL			0x5aaa
     31 #define PCI_DEVICE_ID_INTEL_KBP			0xa2b0
     32 #define PCI_DEVICE_ID_INTEL_CMLH		0x02ee
     33 #define PCI_DEVICE_ID_INTEL_GLK			0x31aa
     34 #define PCI_DEVICE_ID_INTEL_CNPLP		0x9dee
     35 #define PCI_DEVICE_ID_INTEL_CNPH		0xa36e
     36 #define PCI_DEVICE_ID_INTEL_ICLLP		0x34ee
     37 
     38 #define PCI_INTEL_BXT_DSM_GUID		"732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
     39 #define PCI_INTEL_BXT_FUNC_PMU_PWR	4
     40 #define PCI_INTEL_BXT_STATE_D0		0
     41 #define PCI_INTEL_BXT_STATE_D3		3
     42 
     43 #define GP_RWBAR			1
     44 #define GP_RWREG1			0xa0
     45 #define GP_RWREG1_ULPI_REFCLK_DISABLE	(1 << 17)
     46 
     47 /**
     48  * struct dwc3_pci - Driver private structure
     49  * @dwc3: child dwc3 platform_device
     50  * @pci: our link to PCI bus
     51  * @guid: _DSM GUID
     52  * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
     53  * @wakeup_work: work for asynchronous resume
     54  */
     55 struct dwc3_pci {
     56 	struct platform_device *dwc3;
     57 	struct pci_dev *pci;
     58 
     59 	guid_t guid;
     60 
     61 	unsigned int has_dsm_for_pm:1;
     62 	struct work_struct wakeup_work;
     63 };
     64 
     65 static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
     66 static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
     67 
     68 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
     69 	{ "reset-gpios", &reset_gpios, 1 },
     70 	{ "cs-gpios", &cs_gpios, 1 },
     71 	{ },
     72 };
     73 
     74 static struct gpiod_lookup_table platform_bytcr_gpios = {
     75 	.dev_id		= "0000:00:16.0",
     76 	.table		= {
     77 		GPIO_LOOKUP("INT33FC:00", 54, "reset", GPIO_ACTIVE_HIGH),
     78 		GPIO_LOOKUP("INT33FC:02", 14, "cs", GPIO_ACTIVE_HIGH),
     79 		{}
     80 	},
     81 };
     82 
     83 static int dwc3_byt_enable_ulpi_refclock(struct pci_dev *pci)
     84 {
     85 	void __iomem	*reg;
     86 	u32		value;
     87 
     88 	reg = pcim_iomap(pci, GP_RWBAR, 0);
     89 	if (!reg)
     90 		return -ENOMEM;
     91 
     92 	value = readl(reg + GP_RWREG1);
     93 	if (!(value & GP_RWREG1_ULPI_REFCLK_DISABLE))
     94 		goto unmap; /* ULPI refclk already enabled */
     95 
     96 	value &= ~GP_RWREG1_ULPI_REFCLK_DISABLE;
     97 	writel(value, reg + GP_RWREG1);
     98 	/* This comes from the Intel Android x86 tree w/o any explanation */
     99 	msleep(100);
    100 unmap:
    101 	pcim_iounmap(pci, reg);
    102 	return 0;
    103 }
    104 
    105 static const struct property_entry dwc3_pci_intel_properties[] = {
    106 	PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
    107 	PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
    108 	{}
    109 };
    110 
    111 static const struct property_entry dwc3_pci_mrfld_properties[] = {
    112 	PROPERTY_ENTRY_STRING("dr_mode", "otg"),
    113 	PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
    114 	{}
    115 };
    116 
    117 static const struct property_entry dwc3_pci_amd_properties[] = {
    118 	PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
    119 	PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
    120 	PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
    121 	PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
    122 	PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
    123 	PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
    124 	PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
    125 	PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
    126 	PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
    127 	PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
    128 	PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
    129 	/* FIXME these quirks should be removed when AMD NL tapes out */
    130 	PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
    131 	PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
    132 	PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
    133 	PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
    134 	{}
    135 };
    136 
    137 static int dwc3_pci_quirks(struct dwc3_pci *dwc)
    138 {
    139 	struct pci_dev			*pdev = dwc->pci;
    140 
    141 	if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
    142 		if (pdev->device == PCI_DEVICE_ID_INTEL_BXT ||
    143 				pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) {
    144 			guid_parse(PCI_INTEL_BXT_DSM_GUID, &dwc->guid);
    145 			dwc->has_dsm_for_pm = true;
    146 		}
    147 
    148 		if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
    149 			struct gpio_desc *gpio;
    150 			int ret;
    151 
    152 			/* On BYT the FW does not always enable the refclock */
    153 			ret = dwc3_byt_enable_ulpi_refclock(pdev);
    154 			if (ret)
    155 				return ret;
    156 
    157 			ret = devm_acpi_dev_add_driver_gpios(&pdev->dev,
    158 					acpi_dwc3_byt_gpios);
    159 			if (ret)
    160 				dev_dbg(&pdev->dev, "failed to add mapping table\n");
    161 
    162 			/*
    163 			 * A lot of BYT devices lack ACPI resource entries for
    164 			 * the GPIOs, add a fallback mapping to the reference
    165 			 * design GPIOs which all boards seem to use.
    166 			 */
    167 			gpiod_add_lookup_table(&platform_bytcr_gpios);
    168 
    169 			/*
    170 			 * These GPIOs will turn on the USB2 PHY. Note that we have to
    171 			 * put the gpio descriptors again here because the phy driver
    172 			 * might want to grab them, too.
    173 			 */
    174 			gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
    175 			if (IS_ERR(gpio))
    176 				return PTR_ERR(gpio);
    177 
    178 			gpiod_set_value_cansleep(gpio, 1);
    179 			gpiod_put(gpio);
    180 
    181 			gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
    182 			if (IS_ERR(gpio))
    183 				return PTR_ERR(gpio);
    184 
    185 			if (gpio) {
    186 				gpiod_set_value_cansleep(gpio, 1);
    187 				gpiod_put(gpio);
    188 				usleep_range(10000, 11000);
    189 			}
    190 		}
    191 	}
    192 
    193 	return 0;
    194 }
    195 
    196 #ifdef CONFIG_PM
    197 static void dwc3_pci_resume_work(struct work_struct *work)
    198 {
    199 	struct dwc3_pci *dwc = container_of(work, struct dwc3_pci, wakeup_work);
    200 	struct platform_device *dwc3 = dwc->dwc3;
    201 	int ret;
    202 
    203 	ret = pm_runtime_get_sync(&dwc3->dev);
    204 	if (ret)
    205 		return;
    206 
    207 	pm_runtime_mark_last_busy(&dwc3->dev);
    208 	pm_runtime_put_sync_autosuspend(&dwc3->dev);
    209 }
    210 #endif
    211 
    212 static int dwc3_pci_probe(struct pci_dev *pci, const struct pci_device_id *id)
    213 {
    214 	struct property_entry *p = (struct property_entry *)id->driver_data;
    215 	struct dwc3_pci		*dwc;
    216 	struct resource		res[2];
    217 	int			ret;
    218 	struct device		*dev = &pci->dev;
    219 
    220 	ret = pcim_enable_device(pci);
    221 	if (ret) {
    222 		dev_err(dev, "failed to enable pci device\n");
    223 		return -ENODEV;
    224 	}
    225 
    226 	pci_set_master(pci);
    227 
    228 	dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
    229 	if (!dwc)
    230 		return -ENOMEM;
    231 
    232 	dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
    233 	if (!dwc->dwc3)
    234 		return -ENOMEM;
    235 
    236 	memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
    237 
    238 	res[0].start	= pci_resource_start(pci, 0);
    239 	res[0].end	= pci_resource_end(pci, 0);
    240 	res[0].name	= "dwc_usb3";
    241 	res[0].flags	= IORESOURCE_MEM;
    242 
    243 	res[1].start	= pci->irq;
    244 	res[1].name	= "dwc_usb3";
    245 	res[1].flags	= IORESOURCE_IRQ;
    246 
    247 	ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res));
    248 	if (ret) {
    249 		dev_err(dev, "couldn't add resources to dwc3 device\n");
    250 		goto err;
    251 	}
    252 
    253 	dwc->pci = pci;
    254 	dwc->dwc3->dev.parent = dev;
    255 	ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev));
    256 
    257 	ret = platform_device_add_properties(dwc->dwc3, p);
    258 	if (ret < 0)
    259 		return ret;
    260 
    261 	ret = dwc3_pci_quirks(dwc);
    262 	if (ret)
    263 		goto err;
    264 
    265 	ret = platform_device_add(dwc->dwc3);
    266 	if (ret) {
    267 		dev_err(dev, "failed to register dwc3 device\n");
    268 		goto err;
    269 	}
    270 
    271 	device_init_wakeup(dev, true);
    272 	pci_set_drvdata(pci, dwc);
    273 	pm_runtime_put(dev);
    274 #ifdef CONFIG_PM
    275 	INIT_WORK(&dwc->wakeup_work, dwc3_pci_resume_work);
    276 #endif
    277 
    278 	return 0;
    279 err:
    280 	platform_device_put(dwc->dwc3);
    281 	return ret;
    282 }
    283 
    284 static void dwc3_pci_remove(struct pci_dev *pci)
    285 {
    286 	struct dwc3_pci		*dwc = pci_get_drvdata(pci);
    287 	struct pci_dev		*pdev = dwc->pci;
    288 
    289 	if (pdev->device == PCI_DEVICE_ID_INTEL_BYT)
    290 		gpiod_remove_lookup_table(&platform_bytcr_gpios);
    291 #ifdef CONFIG_PM
    292 	cancel_work_sync(&dwc->wakeup_work);
    293 #endif
    294 	device_init_wakeup(&pci->dev, false);
    295 	pm_runtime_get(&pci->dev);
    296 	platform_device_unregister(dwc->dwc3);
    297 }
    298 
    299 static const struct pci_device_id dwc3_pci_id_table[] = {
    300 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BSW),
    301 	  (kernel_ulong_t) &dwc3_pci_intel_properties },
    302 
    303 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BYT),
    304 	  (kernel_ulong_t) &dwc3_pci_intel_properties, },
    305 
    306 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD),
    307 	  (kernel_ulong_t) &dwc3_pci_mrfld_properties, },
    308 
    309 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CMLH),
    310 	  (kernel_ulong_t) &dwc3_pci_intel_properties, },
    311 
    312 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SPTLP),
    313 	  (kernel_ulong_t) &dwc3_pci_intel_properties, },
    314 
    315 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SPTH),
    316 	  (kernel_ulong_t) &dwc3_pci_intel_properties, },
    317 
    318 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BXT),
    319 	  (kernel_ulong_t) &dwc3_pci_intel_properties, },
    320 
    321 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BXT_M),
    322 	  (kernel_ulong_t) &dwc3_pci_intel_properties, },
    323 
    324 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_APL),
    325 	  (kernel_ulong_t) &dwc3_pci_intel_properties, },
    326 
    327 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_KBP),
    328 	  (kernel_ulong_t) &dwc3_pci_intel_properties, },
    329 
    330 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_GLK),
    331 	  (kernel_ulong_t) &dwc3_pci_intel_properties, },
    332 
    333 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CNPLP),
    334 	  (kernel_ulong_t) &dwc3_pci_intel_properties, },
    335 
    336 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CNPH),
    337 	  (kernel_ulong_t) &dwc3_pci_intel_properties, },
    338 
    339 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICLLP),
    340 	  (kernel_ulong_t) &dwc3_pci_intel_properties, },
    341 
    342 	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_NL_USB),
    343 	  (kernel_ulong_t) &dwc3_pci_amd_properties, },
    344 	{  }	/* Terminating Entry */
    345 };
    346 MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
    347 
    348 #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
    349 static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param)
    350 {
    351 	union acpi_object *obj;
    352 	union acpi_object tmp;
    353 	union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp);
    354 
    355 	if (!dwc->has_dsm_for_pm)
    356 		return 0;
    357 
    358 	tmp.type = ACPI_TYPE_INTEGER;
    359 	tmp.integer.value = param;
    360 
    361 	obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), &dwc->guid,
    362 			1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4);
    363 	if (!obj) {
    364 		dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n");
    365 		return -EIO;
    366 	}
    367 
    368 	ACPI_FREE(obj);
    369 
    370 	return 0;
    371 }
    372 #endif /* CONFIG_PM || CONFIG_PM_SLEEP */
    373 
    374 #ifdef CONFIG_PM
    375 static int dwc3_pci_runtime_suspend(struct device *dev)
    376 {
    377 	struct dwc3_pci		*dwc = dev_get_drvdata(dev);
    378 
    379 	if (device_can_wakeup(dev))
    380 		return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
    381 
    382 	return -EBUSY;
    383 }
    384 
    385 static int dwc3_pci_runtime_resume(struct device *dev)
    386 {
    387 	struct dwc3_pci		*dwc = dev_get_drvdata(dev);
    388 	int			ret;
    389 
    390 	ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
    391 	if (ret)
    392 		return ret;
    393 
    394 	queue_work(pm_wq, &dwc->wakeup_work);
    395 
    396 	return 0;
    397 }
    398 #endif /* CONFIG_PM */
    399 
    400 #ifdef CONFIG_PM_SLEEP
    401 static int dwc3_pci_suspend(struct device *dev)
    402 {
    403 	struct dwc3_pci		*dwc = dev_get_drvdata(dev);
    404 
    405 	return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
    406 }
    407 
    408 static int dwc3_pci_resume(struct device *dev)
    409 {
    410 	struct dwc3_pci		*dwc = dev_get_drvdata(dev);
    411 
    412 	return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
    413 }
    414 #endif /* CONFIG_PM_SLEEP */
    415 
    416 static const struct dev_pm_ops dwc3_pci_dev_pm_ops = {
    417 	SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
    418 	SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
    419 		NULL)
    420 };
    421 
    422 static struct pci_driver dwc3_pci_driver = {
    423 	.name		= "dwc3-pci",
    424 	.id_table	= dwc3_pci_id_table,
    425 	.probe		= dwc3_pci_probe,
    426 	.remove		= dwc3_pci_remove,
    427 	.driver		= {
    428 		.pm	= &dwc3_pci_dev_pm_ops,
    429 	}
    430 };
    431 
    432 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
    433 MODULE_LICENSE("GPL v2");
    434 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
    435 
    436 module_pci_driver(dwc3_pci_driver);